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 NCP112 Supervisory IC for Desktop Power Supply Monitoring
The NCP112 is a highly integrated supervisory circuit that incorporates all the functions necessary for monitoring and controlling a multi-output switch-mode power supply system. The NCP112 provides an ability to monitor the status of the power supply outputs and communicate it to the system controller. The programmable output delays protect against spurious fault indicators.
Features http://onsemi.com MARKING DIAGRAMS
14 1 SOIC-14 D SUFFIX CASE 751A 1 NCP112DG AWLYWW
* Under and Overvoltage Protection for 3.3 V, 5.0 V and 12 V * * * * * * * * * *
Outputs Additional Adjustable Overvoltage Protection Input Built-in Hysteresis on all Input Pins Programmable Undervoltage Blanking During Power-Up Fault Output with 20 mA Sink Capability Programmable Remote On/Off Delay Time Programmable Power Good Delay Time Precision Voltage Reference with 20 mA Source Capability Optimized for Low-Cost 100 nF Capacitors Enhanced Replacement to the TSM112 Pb-Free Packages are Available
1
PDIP-14 P SUFFIX CASE 646
14 NCP112P AWLYYWWG 1
Typical Applications
* Personal Computer Switch Mode Power Supply Monitoring * Multi-Output Power Supplies Requiring System Supervision
A WL Y, YY WW G
= Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package
PIN CONNECTIONS
VS33 VS5 VS12 ADJ PGI CTUV GND VCC FAULT PGO CTPG CTREMOTE REMOTE VREF
PDIP-14, SOIC-14
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2006
October, 2006 - Rev. 3
1
Publication Order Number: NCP112/D
NCP112
PIN FUNCTION DESCRIPTION
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Symbol VS33 VS5 VS12 ADJ PGI CTUV GND VREF REMOTE CTREMOTE CTPG PGO FAULT VCC Function 3.3 V SENSE INPUT 5.0 V SENSE INPUT 12 V SENSE INPUT ADJUSTABLE OVP INPUT POWER GOOD INPUT ADJUSTABLE TIMING CAPACITOR GROUND VOLTAGE REFERENCE REMOTE ON/OFF INPUT ADJUSTABLE REMOTE ON/OFF CAPACITOR ADJUSTABLE POWER GOOD CAPACITOR POWER GOOD OUTPUT FAULT OUTPUT POWER SUPPLY VOLTAGE Description Over/undervoltage sense input for 3.3 V. Over/undervoltage sense input for 5.0 V. Over/undervoltage sense input for 12 V. May be used for an additional overvoltage protection signal. Power good input signal. Adjustable undervoltage blanking delay during power-up. Ground Precision 2.5 V reference output. Input remote control from the microcontroller. Acts as a reset signal after a fault condition. Adjustable remote delay. Adjustable power good delay. Power good output. Active high when no fault conditions are present. Detects over/undervoltage conditions. Active high during a fault condition. Power supply voltage.
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NCP112
VCC 14 VREF VS33 VS5 VS12 1 2 3 OV Detector OV Fault Delay VCC 13
SET
FAULT
S
Q
R CLR Q Remote On/Off Delay 3.4 V
UV Detector
10
CTREMOTE
VREF
8
2.5 V Reference UV Blanking Delay at Power Up - +
+ - 1.28 V
9
REMOTE
1.28 V 4
+ -
1.28 V 5 PGI
ADJ
VCC GND 7 12 Power Good Delay PGO
6 CTUV
11 CTPG
Figure 1. Block Diagram
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NCP112
MAXIMUM RATINGS
Rating Power Supply Voltage (Note 1) Power Good Output Current Fault Output Current Voltage Reference Output Current Voltage Rating (Pins 4, 5, 6, 9, 10, 11) Voltage Rating (Pins 12, 13) Power Dissipation and Thermal Characteristics (PDIP-14) Thermal Resistance, Junction-to-Air Thermal Resistance, Junction-to-Case Maximum Power Dissipation @ 25C Power Dissipation and Thermal Characteristics (SOIC-14) Thermal Resistance, Junction-to-Air Thermal Resistance, Junction-to-Case Maximum Power Dissipation @ 25C Operating Junction Temperature Operating Ambient Temperature Storage Temperature Range Symbol VCC IPGO IFAULT IREF ADJ, PGI, CTUV, REMOTE, CTREMOTE, CTPG PGO, FAULT RqJA RqJC PD RqJA RqJC PD TJ TA Tstg Value 18 30 30 20 VCC 18 100 45 1.25 125 30 1.0 +150 -40 to +125 -55 to +150 Unit V mA mA mA V V C/W C/W W C/W C/W W C C C
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, TA = 25C for typical values and TA = 0C to 85C for min and max values, unless
otherwise noted.) Characteristic OPERATING CONDITIONS DC Power Supply Power Supply Current OVERVOLTAGE/UNDERVOLTAGE PROTECTION Overvoltage Protection 3.3 V Output Sense Hysteresis* 5.0 V Output Sense Hysteresis* 12 V Output Sense Hysteresis* Undervoltage Protection 3.3 V Output Sense Hysteresis* 5.0 V Output Sense Hysteresis* 12 V Output Sense Hysteresis* VUV33 VUVhys33 VUV5 VUVhys5 VUV12 VUVhys12 2.3 - 3.7 - 9.2 - 2.5 100 4.0 100 10 100 2.7 - 4.3 - 10.8 - V mV V mV V mV VOV33 VOVhys33 VOV5 VOVhys5 VOV12 VOVhys12 3.8 - 5.8 - 13.4 - 4.0 40 6.1 60 14.2 130 4.2 - 6.4 - 15 - V mV V mV V mV VCC ICC 4.5 - - 3.0 16 5.0 V mA Symbol Min Typ Max Unit
*Hysteresis is measured in direction from threshold point back to nominal value of input voltage (i.e. 3.3 V, 5.0 V or 12 V). 1. This device contains ESD protection and exceeds the following tests: Human Body Model JESD 22-A114-B: 2.0 kV Machine Model JESD 22-A115-A: 200 V
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NCP112
ELECTRICAL CHARACTERISTICS (continued) (VCC = 5.0 V, TA = 25C for typical values and TA = 0C to 85C for min and max
values, unless otherwise noted.) Characteristic OVERVOLTAGE/UNDERVOLTAGE PROTECTION (continued) Undervoltage Protection (continued) Adjustable Overvoltage Protection Threshold Hysteresis UNDERVOLTAGE BLANKING DURING POWER UP Undervoltage Blanking Time (CTUV = 100 nF) Undervoltage Blanking Threshold Voltage (Pin 6) POWER GOOD Power Good Input Threshold Voltage Power Good Input Hysteresis Low State Open Collector Saturation Voltage (I = 20 mA) High State Open Collector Leakage Current (V = 5.0 V) Power Good Transient (See Application Note Section) Rise Time Fall Time Adjustable Delay Time (CTPG = 100 nF) Power Good Threshold Voltage (Pin 11) FAULT Fault Sink Current Fault Saturation Voltage (I = 20 mA) Fault Leakage Current (V = 5.0 V) Fault Delay Time Before Latching REMOTE CONTROL Remote Input Voltage Threshold Remote Hysteresis Remote Pin Internal Pull-Up Voltage Remote Low State Saturation Current Remote Time Delay (CTREMOTE = 100 nF) Remote On Remote Off Remote Delay Threshold Voltage (Pin 10) Low Level High Level VOLTAGE REFERENCE Internal Voltage Reference (IO = 1.0 mA) @ 25C Internal Voltage Reference (IO = 1.0 mA) 0C to 85C Line Regulation (4.5 V < VCC < 16 V) Iout = 0 mA Iout = 10 mA Load Regulation (VCC = 5.0 V) 0 mA < Iout < 10 mA VREF VREF VREFline VREFline VREFload 2.46 2.42 - - - 2.50 2.50 4.0 15 25 2.54 2.58 10 - - mV V mV VRth VRhys VRh IRl TREMon TREMoff TREMth lo TREMth hi - - 3.3 - 35 35 - - 1.28 25 3.4 - 45 45 0.2 2.3 - - 3.6 0.5 60 60 V - - V mV V mA ms IFAULT VFAULTsat IFAULTleak TFAULT 20 - - - - - - 100 - 0.4 1.0 - mA V mA ms VPGIth VPGIhys VLsat IHleak - - - - 1.28 25 - - - - 0.4 1.0 V mV V mA ms TPGraise TPGfall TPG TPGth - - 100 - 1.0 1.0 300 2.5 - - 500 - ms V TUV TUVth 100 - 300 2.5 500 - ms V VADJth VADJth - - 1.28 100 - - V mV Symbol Min Typ Max Unit
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NCP112
VCC REMOTE
FAULT
PGI
PGO OVP
UVP 3.3 V, 5 V, 12 V Tpg Tremote (ON) Tremote (OFF) Tfault (OV)
Figure 2. Timing Diagram Table 1. FUNCTION TABLE
PGI <1.28 V (L) <1.28 V (L) <1.28 V (L) <1.28 V (L) <1.28 V (L) <1.28 V (L) >1.28 V (H) >1.28 V (H) >1.28 V (H) >1.28 V (H) >1.28 V (H) >1.28 V (H) X REMOTE L L L L L L L L L L L L H ADJ <1.28 V (L) <1.28 V (L) <1.28 V (L) >1.28 V (H) >1.28 V (H) >1.28 V (H) <1.28 V (L) <1.28 V (L) <1.28 V (L) >1.28 V (H) >1.28 V (H) >1.28 V (H) X Undervoltage No No Yes No No Yes No No Yes No No Yes X Overvoltage No Yes No No Yes No No Yes No No Yes No X FAULT H H H L H H H H H L H H H PGO L L L L L L L L L H L L L
2. X = > Don't care. 3. FAULT = L means main PWM is Enable. 4. PGO = H means power supply is working within ATX specifications.
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NCP112
X PRIMARY RECTIFIER MAIN CONVERTER 12 V 12 V 5V 3.3 V 5V
3.3 V
PWM + OPTO + Vref
AUXILIARY CONVERTER
VCC 5 V STBY 5 V STBY
PWM + OPTO + Vref NCP112 FAULT - Over and Undervoltage Protection - Reference - Logic - Sequencer PG
REM
Figure 3. Simplified Application Schematic
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NCP112
PIN FUNCTION DESCRIPTION
Main Line Sensing - VS33, VS5 and VS12
These pins are used to monitor the main power outputs. The internal circuitry of the NCP112 provides over and undervoltage detection and indicates an error state. The over and undervoltage levels meet the ATX specification. In order to avoid unexpected oscillation of the device, the NCP112 features both over and undervoltage hysteresis. The overvoltage detection circuitry incorporates a fault delay, which helps to filter short positive voltage spikes below 100 ms. To avoid triggering a false undervoltage signal during power-up, a timing capacitor (CTUV) may be used to introduce a user defined blanking delay.
Additional Overvoltage Protection - ADJ
internal current sources for charging and/or discharging capacitors.
Remote Control - REMOTE
This pin can be used as another user-defined monitoring input and has a hysteresis feature similar to VS33, VS5 and VS12. When the input voltage is below the threshold level of 1.28 V, a fault condition is asserted. Note that the ADJ pin is logically ORed with the overvoltage detector output, thus there is a 100 ms fault delay.
Power Good Input - PGI
A reset signal can be realized with the REMOTE pin. When the Remote pin is in the active low state, the external link (the Fault signal) between the NCP112 and the Pulse Width Modulator (PWM) generator of the external power supply is enabled (Figure 3). In order to effectively reset the latch, a minimum width remote pulse should be applied. The width of this pulse should be greater than TREM, which is determined by adding an external capacitor (CTREMOTE). Note that the REMOTE pin is internally pulled up to 3.4 V.
Power Good Output - PGO
The Power Good Input (PGI) can be used to monitor an additional logic event, for example, the temperature inside an ATX power supply unit. When the input voltage at the PGI input is below the threshold level of 1.28 V, the Power Good Output (PGO) signal remains in a low state, even if all three sense inputs are within voltage limits. The PGI signal, along with the REMOTE, and the over and undervoltage singles encounter a power good delay circuit as depicted in Figure 1.
Timing Capacitors - CTUV, CTREMOTE, CTPG
The purpose of the PGO function is to warn the motherboard that the voltage of at least one of the three main power lines is out of range, independent of the ADJ input. Please refer to Table 1 for a functional Truth table. The PGO is subject to a delay TPG, which can be adjusted with an external capacitor (CTPG). The Power Good Output pin is capable of sinking 20 mA of current.
Fault Output - FAULT
The NCP112 timing circuitry is optimized for utilizing low cost, 100 nF ceramic capacitors. The time delays of CTUV, CTREMOTE, and CTPG can be adjusted by simply changing external capacitor values. The time delay is a linear function of the capacitance because the NCP112 uses
ORDERING INFORMATION
Device NCP112P NCP112PG NCP112D NCP112DG NCP112DR2 NCP112DR2G
In a typical application such as Figure 3, the fault pin (FAULT), is activated when any one of the three main power lines (3.3 V, 5.0 V, 12 V) is out of range or the ADJ pin is below 1.28 V. This is independent of the PGI input. The Fault output is the external link between the NCP112 and the primary PWM. In the event of a short circuit condition, the overvoltage circuitry provides an additional delay time TFAULT which provides adequate protection.
Voltage Reference - VREF
The VREF is a 2.5V precision reference output, with current sourcing capability of 20 mA. No bypass capacitor or minimum output current is required to maintain stability.
Package PDIP-14 PDIP-14 (Pb-Free) SOIC-14 SOIC-14 (Pb-Free) SOIC-14 SOIC-14 (Pb-Free)
Shipping 25 Units / Rail
55 Units / Rail
2500 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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NCP112
PACKAGE DIMENSIONS
PDIP-14 CASE 646-06 ISSUE P
14
8
B
1 7
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 --- 10 _ 0.015 0.039 MILLIMETERS MIN MAX 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 --- 10 _ 0.38 1.01
A F N -T-
SEATING PLANE
L C
H
G
D 14 PL
K
M
J M
DIM A B C D F G H J K L M N
0.13 (0.005)
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NCP112
PACKAGE DIMENSIONS
SOIC-14 CASE 751A-03 ISSUE H
-A-
14 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
-B-
P 7 PL 0.25 (0.010)
M
B
M
1
7
G C -T-
SEATING PLANE
R X 45 _
F
D 14 PL 0.25 (0.010)
K
M
M
S
J
TB
A
S
SOLDERING FOOTPRINT*
7X
DIM A B C D F G J K M P R
MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50
INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019
7.04 1 0.58
14X
14X
1.52
1.27 PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
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NCP112/D


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